Granted Patent
Utility
US 6,222,476 · App. 09/386,029
Architecture to reduce errors due to metastability in analog to digital converters
Inventors:
Sang Soo Lee, Tzu-wang Pan
Patented Case
View Patent ↗
Granted: Apr 24, 2001
Filed: Aug 30, 1999
Inventors
Sang Soo Lee
Tzu-wang Pan
Assignee (at issue)
LSI Logic Corporation
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.