Data processing circuit with cache memory and cache management unit for arranging selected storage location in the cache memory for reuse dependent on a position of particular address relative to current address

Granted: May 1, 2001 Filed: May 6, 1999

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.