Method for fabricating a DRAM cell capacitor including etching upper conductive layer with etching byproduct forming an etch barrier on the conductive pattern

Granted: May 29, 2001 Filed: Jun 30, 1999

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.