Granted Patent
Utility
US 6,247,162 · App. 09/221,600
Method and apparatus for generating layout data for a semiconductor integrated circuit device
Inventors:
Eiji Fujine, Takanori Nawa, Hiroshi Yuyama, Masahito Isoda
Patented Case
View Patent ↗
Granted: Jun 12, 2001
Filed: Dec 29, 1998
Inventors
Eiji Fujine
Takanori Nawa
Hiroshi Yuyama
Masahito Isoda
Assignee (at issue)
Fujitsu Limited
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.