Granted Patent
Utility
US 6,256,221 · App. 09/507,106
Arrays of two-transistor, one-capacitor dynamic random access memory cells with interdigitated bitlines
Inventors:
Wayland Bart Holland, Craig Michael Waller, G. R. Mohan Rao
Patented Case
View Patent ↗
Granted: Jul 3, 2001
Filed: Feb 17, 2000
Inventors
Wayland Bart Holland
Craig Michael Waller
G. R. Mohan Rao
Assignee (at issue)
Silicon Aquarius, Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.