Granted Patent
Utility
US 6,281,077 · App. 09/392,937
Method for manufacturing electronic devices comprising non-volatile memory cells and LV transistors with salicided junctions
Inventors:
Matteo Patelmo, Giovanna Dalla Libera, Nadia Galbiati, Bruno Vajana
Patented Case
View Patent ↗
Granted: Aug 28, 2001
Filed: Sep 9, 1999
Inventors
Matteo Patelmo
Giovanna Dalla Libera
Nadia Galbiati
Bruno Vajana
Assignee (at issue)
STMICROELECTRONICS S.r.l.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.