Granted Patent
Utility
US 6,282,131 · App. 09/671,456
Self-timed clock circuitry in a multi-bank memory instance using a common timing synchronization node
Inventor:
Richard S. Roy
Patented Case
View Patent ↗
Granted: Aug 28, 2001
Filed: Sep 27, 2000
Inventor
Richard S. Roy
Assignee (at issue)
Virage Logic Corporation
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.