Granted Patent
Utility
US 6,282,145 · App. 09/231,928
Array architecture and operating methods for digital multilevel nonvolatile memory integrated circuit system
Inventors:
Hieu Van Tran, Sakhawat M. Khan, George J. Korsh
Patented Case
View Patent ↗
Granted: Aug 28, 2001
Filed: Jan 14, 1999
Inventors
Hieu Van Tran
Sakhawat M. Khan
George J. Korsh
Assignee (at issue)
Silicon Storage Technology, Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.