IP Library Granted Patent US 6,285,247
Granted Patent Utility
US 6,285,247 · App. 09/235,007

Optimized low voltage CMOS operation

Inventor: Masakazu Shoji
Patented Case View Patent ↗
Granted: Sep 4, 2001 Filed: Jan 21, 1999
Inventor
Masakazu Shoji
Assignee (at issue)
Agere Systems Guardian Corporation

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Quick Facts
Patent No.
US 6,285,247
App. No.
09/235,007
Filed
1999-01-21
Granted
2001-09-04
Kind
A