IP Library Granted Patent US 6,288,596
Granted Patent Utility
US 6,288,596 · App. 09/489,947

Gate biasing arrangement to temperature compensate a quiescent current of a power transistor

Inventors: Jan Johansson, Per Ericsson, Nils Af Ekenstam, Henrik Sjoden
Patented Case View Patent ↗
Granted: Sep 11, 2001 Filed: Jan 24, 2000
Inventors
Jan Johansson
Per Ericsson
Nils Af Ekenstam
Henrik Sjoden
Assignee (at issue)
TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)

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Quick Facts
Patent No.
US 6,288,596
App. No.
09/489,947
Filed
2000-01-24
Granted
2001-09-11
Kind
A