IP Library Granted Patent US 6,304,992
Granted Patent Utility
US 6,304,992 · App. 09/160,214

Technique for correcting single-bit errors in caches with sub-block parity bits

Inventor: Robert E. Cypher
Patented Case View Patent ↗
Granted: Oct 16, 2001 Filed: Sep 24, 1998
Inventor
Robert E. Cypher
Assignee (at issue)
Sun Microsystems Inc.

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.

Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,304,992
App. No.
09/160,214
Filed
1998-09-24
Granted
2001-10-16
Kind
A