Granted Patent
Utility
US 6,313,486 · App. 09/595,366
Floating gate transistor having buried strained silicon germanium channel layer
Inventors:
David L. Kencke, Sanjay Banerjee
Patented Case
View Patent ↗
Granted: Nov 6, 2001
Filed: Jun 15, 2000
Inventors
David L. Kencke
Sanjay Banerjee
Assignee (at issue)
BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.