IP Library Granted Patent US 6,320,244
Granted Patent Utility
US 6,320,244 · App. 09/388,682

Integrated circuit device having dual damascene capacitor

Inventors: Glenn B. Alers, Seungmoo Choi, Sailesh Mansinh Merchant, Pradip K. Roy
Patented Case View Patent ↗
Granted: Nov 20, 2001 Filed: Sep 2, 1999
Inventors
Glenn B. Alers
Seungmoo Choi
Sailesh Mansinh Merchant
Pradip K. Roy
Assignee (at issue)
Agere Systems Guardian Corporation

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.

Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,320,244
App. No.
09/388,682
Filed
1999-09-02
Granted
2001-11-20
Kind
A