Granted Patent
Utility
US 6,327,686 · App. 09/298,265
Method for analyzing manufacturing test pattern coverage of critical delay circuit paths
Inventors:
William J. Grundmann, Nicholas Lee Rethman
Patented Case
View Patent ↗
Granted: Dec 4, 2001
Filed: Apr 22, 1999
Inventors
William J. Grundmann
Nicholas Lee Rethman
Assignee (at issue)
Compaq Computer Corporation
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.