Granted Patent
Utility
US 6,339,541 · App. 09/595,143
Architecture for high speed memory circuit having a relatively large number of internal data lines
Inventors:
Kim C. Hardee, John D. Heightley, Lawrence Lee Aldrich
Patented Case
View Patent ↗
Granted: Jan 15, 2002
Filed: Jun 16, 2000
Inventors
Kim C. Hardee
John D. Heightley
Lawrence Lee Aldrich
Assignees (at issue)
United Memories, Inc.
SONY GROUP CORPORATION
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.