Granted Patent
Utility
US 6,345,372 · App. 09/547,683
Method for testing bus connections of writable and readable integrated electronic circuits, in particular memory components
Inventors:
Andreas Dieckmann, Markus Donderer
Patented Case
View Patent ↗
Granted: Feb 5, 2002
Filed: Apr 12, 2000
Inventors
Andreas Dieckmann
Markus Donderer
Assignee (at issue)
Infineon Technologies AG
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.