Granted Patent
Utility
US 6,346,428 · App. 09/135,210
Method and apparatus for minimizing semiconductor wafer arcing during semiconductor wafer processing
Inventors:
Satish D. Athavale, Leslie G. Jerde, John A. Meyer
Patented Case
View Patent ↗
Granted: Feb 12, 2002
Filed: Aug 17, 1998
Inventors
Satish D. Athavale
Leslie G. Jerde
John A. Meyer
Assignee (at issue)
TEGAL CORPORATION
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.