IP Library › Granted Patent US 6,350,640
Granted Patent Utility
US 6,350,640 · App. 08/276,290

CMOS integrated circuit architecture incorporating deep implanted emitter region to form auxiliary bipolar transistor

Inventors: Robert T. Fuller, Chris A. McCarty, John T. Gasner, Michael D. Church
Patented Case View Patent ↗
Granted: Feb 26, 2002 Filed: Jul 18, 1994
Inventors
Robert T. Fuller
Chris A. McCarty
John T. Gasner
Michael D. Church
Assignee (at issue)
Intersil Americas LLC

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.

Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,350,640
App. No.
08/276,290
Filed
1994-07-18
Granted
2002-02-26
Kind
B1