Granted Patent
Utility
US 6,356,480 · App. 09/588,645
Nonvolatile semiconductor memory device capable of suppressing reduction of bit line potential in write-back operation and erase method
Inventors:
Kiyohiko Sakakibara, Susumu Takeuchi, Makoto Yamamoto, Kunio Tani, Yukio Nakamoto, Tomohisa Iba
Patented Case
View Patent ↗
Granted: Mar 12, 2002
Filed: Jun 7, 2000
Inventors
Kiyohiko Sakakibara
Susumu Takeuchi
Makoto Yamamoto
Kunio Tani
Yukio Nakamoto
Tomohisa Iba
Assignees (at issue)
MITSUBISHI ELECTRIC CORPORATION
MITSUBISHI ELECTRIC ENGINEERING COMPANY, LIMITED
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.