IP Library › Granted Patent US 6,405,285
Granted Patent Utility
US 6,405,285 · App. 09/340,076

Layered local cache mechanism with split register load bus and cache load bus

Inventors: Ravi Kumar Arimilli, Leo James Clark, John Steven Dodson, Guy L. Guthrie
Patented Case View Patent ↗
Granted: Jun 11, 2002 Filed: Jun 25, 1999
Inventors
Ravi Kumar Arimilli
Leo James Clark
John Steven Dodson
Guy L. Guthrie
Assignee (at issue)
International Business Machines Corporation

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Quick Facts
Patent No.
US 6,405,285
App. No.
09/340,076
Filed
1999-06-25
Granted
2002-06-11
Kind
B1