Granted Patent
Utility
US 6,407,953 · App. 09/775,956
Memory array organization and related test method particularly well suited for integrated circuits having write-once memory arrays
Inventor:
James M. Cleeves
Patented Case
View Patent ↗
Granted: Jun 18, 2002
Filed: Feb 2, 2001
Inventor
James M. Cleeves
Assignee (at issue)
MATRIX SEMICONDUCTOR, INC.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.