Granted Patent
Utility
US 6,424,034 · App. 09/144,197
High performance packaging for microprocessors and DRAM chips which minimizes timing skews
Inventors:
Kie Y. Ahn, Leonard Forbes, Paul A. Farrar
Patented Case
View Patent ↗
Granted: Jul 23, 2002
Filed: Aug 31, 1998
Inventors
Kie Y. Ahn
Leonard Forbes
Paul A. Farrar
Assignee (at issue)
Micron Technology, Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.