Granted Patent
Utility
US 6,446,243 · App. 09/298,320
Method for functional verification of VLSI circuit designs utilizing reusable functional blocks or intellectual property cores
Inventors:
Yen-Son Paul Huang, Chia-Huei Lee, Changson Teng
Patented Case
View Patent ↗
Granted: Sep 3, 2002
Filed: Apr 23, 1999
Inventors
Yen-Son Paul Huang
Chia-Huei Lee
Changson Teng
Assignee (at issue)
Novas Software, Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.