IP Library › Granted Patent US 6,470,485
Granted Patent Utility
US 6,470,485 · App. 09/692,694

Scalable and parallel processing methods and structures for testing configurable interconnect network in FPGA device

Inventors: Richard T. Cote, Brenda Nguyen, Xuan Dai Pham, Bradley A. Sharpe-Geisler
Patented Case View Patent ↗
Granted: Oct 22, 2002 Filed: Oct 18, 2000
Inventors
Richard T. Cote
Brenda Nguyen
Xuan Dai Pham
Bradley A. Sharpe-Geisler
Assignee (at issue)
Lattice Semiconductor Corporation

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Quick Facts
Patent No.
US 6,470,485
App. No.
09/692,694
Filed
2000-10-18
Granted
2002-10-22
Kind
B1