IP Library Granted Patent US 6,473,352
Granted Patent Utility
US 6,473,352 · App. 09/843,690

Semiconductor integrated circuit device having efficiently arranged link program circuitry

Inventors: Aiko Nishino, Naoya Watanabe, Katsumi Dosaka
Patented Case View Patent ↗
Granted: Oct 29, 2002 Filed: Apr 30, 2001
Inventors
Aiko Nishino
Naoya Watanabe
Katsumi Dosaka
Assignees (at issue)
MITSUBISHI ELECTRIC CORPORATION
MITSUBISHI ELECTRIC ENGINEERING COMPANY, LIMITED

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.

Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,473,352
App. No.
09/843,690
Filed
2001-04-30
Granted
2002-10-29
Kind
B2