IP Library Granted Patent US 6,479,404
Granted Patent Utility
US 6,479,404 · App. 09/641,160

Process for fabricating a semiconductor device having a metal oxide or a metal silicate gate dielectric layer

Inventors: Michael L. Steigerwald, Glen Wilk
Patented Case View Patent ↗
Granted: Nov 12, 2002 Filed: Aug 17, 2000
Inventors
Michael L. Steigerwald
Glen Wilk
Assignee (at issue)
Agere Systems Inc.

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.

Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,479,404
App. No.
09/641,160
Filed
2000-08-17
Granted
2002-11-12
Kind
B1