Granted Patent
Utility
US 6,480,017 · App. 09/770,501
Evaluating pattern for measuring an erosion of a semiconductor wafer polished by a chemical mechanical polishing
Inventor:
Tadashi Narita
Patented Case
View Patent ↗
Granted: Nov 12, 2002
Filed: Jan 29, 2001
Inventor
Tadashi Narita
Assignee (at issue)
OKI ELECTRIC INDUSTRY CO., LTD.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.