IP Library Granted Patent US 6,486,705
Granted Patent Utility
US 6,486,705 · App. 09/864,276

Signal distribution scheme in field programmable gate array (FPGA) or field programmable system chip (FPSC) including cycle stealing units

Inventors: William B. Andrews, Alfred E. Dunlop, John Philip Fishburn, Harold Scholz
Patented Case View Patent ↗
Granted: Nov 26, 2002 Filed: May 25, 2001
Inventors
William B. Andrews
Alfred E. Dunlop
John Philip Fishburn
Harold Scholz
Assignee (at issue)
Lattice Semiconductor Corporation

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Quick Facts
Patent No.
US 6,486,705
App. No.
09/864,276
Filed
2001-05-25
Granted
2002-11-26
Kind
B2