IP Library Granted Patent US 6,492,679
Granted Patent Utility
US 6,492,679 · App. 09/920,655

Method for manufacturing a high voltage MOSFET device with reduced on-resistance

Inventors: Mohamed Imam, Joe Fulton, Zia Hossain, Masami Tanaka, Taku Yamamoto, Yoshio Enosawa, Katsuya Yamazaki, Evgueniy Stefanov
Patented Case View Patent ↗
Granted: Dec 10, 2002 Filed: Aug 3, 2001
Inventors
Mohamed Imam
Joe Fulton
Zia Hossain
Masami Tanaka
Taku Yamamoto
Yoshio Enosawa
Katsuya Yamazaki
Evgueniy Stefanov
Assignee (at issue)
SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

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Quick Facts
Patent No.
US 6,492,679
App. No.
09/920,655
Filed
2001-08-03
Granted
2002-12-10
Kind
B1