Granted Patent
Utility
US 6,496,972 · App. 09/395,025
Method and system for circuit design top level and block optimization
Inventor:
Russell B. Segal
Patented Case
View Patent ↗
Granted: Dec 17, 2002
Filed: Sep 13, 1999
Inventor
Russell B. Segal
Assignee (at issue)
Synopsys, Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.