IP Library › Granted Patent US 6,501,147
Granted Patent Utility
US 6,501,147 · App. 09/713,144

Process for manufacturing electronic devices comprising high voltage MOS transistors, and electronic device thus obtained

Inventors: Bruno Vajana, Matteo Patelmo
Patented Case View Patent ↗
Granted: Dec 31, 2002 Filed: Nov 14, 2000
Inventors
Bruno Vajana
Matteo Patelmo
Assignee (at issue)
STMICROELECTRONICS S.r.l.

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Quick Facts
Patent No.
US 6,501,147
App. No.
09/713,144
Filed
2000-11-14
Granted
2002-12-31
Kind
B1