Granted Patent
Utility
US 6,529,028 · App. 09/302,649
Configuration for testing a plurality of memory chips on a wafer
Inventors:
Dieter Harle, Patrick Heyne, Martin Buck
Patented Case
View Patent ↗
Granted: Mar 4, 2003
Filed: Apr 30, 1999
Inventors
Dieter Harle
Patrick Heyne
Martin Buck
Assignee (at issue)
Infineon Technologies AG
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.