IP Library Granted Patent US 6,531,378
Granted Patent Utility
US 6,531,378 · App. 09/968,576

Method for processing wafer by applying layer to protect the backside during a tempering step and removing contaminated portions of the layer

Inventor: Joachim Hopfner
Patented Case View Patent ↗
Granted: Mar 11, 2003 Filed: Oct 1, 2001
Inventor
Joachim Hopfner
Assignee (at issue)
Infineon Technologies AG

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.

Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,531,378
App. No.
09/968,576
Filed
2001-10-01
Granted
2003-03-11
Kind
B2