Granted Patent
Utility
US 6,534,341 · App. 09/920,970
Methods of wafer level fabrication and assembly of chip scale packages
Inventor:
Warren M. Farnworth
Patented Case
View Patent ↗
Granted: Mar 18, 2003
Filed: Aug 2, 2001
Inventor
Warren M. Farnworth
Assignee (at issue)
Micron Technology, Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.