Granted Patent
Utility
US 6,536,022 · App. 09/513,545
Two pole coupling noise analysis model for submicron integrated circuit design verification
Inventors:
Kathirgamar Aingaran, Edgardo F. Klass, Chaim Amir, Chin Kim
Patented Case
View Patent ↗
Granted: Mar 18, 2003
Filed: Feb 25, 2000
Inventors
Kathirgamar Aingaran
Edgardo F. Klass
Chaim Amir
Chin Kim
Assignee (at issue)
Sun Microsystems Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.