IP Library Granted Patent US 6,544,859
Granted Patent Utility
US 6,544,859 · App. 10/003,130

Semiconductor processing methods and structures for determining alignment during semiconductor wafer processing

Inventors: David Ziger, Edward Dension, Pierre Leroux
Patented Case View Patent ↗
Granted: Apr 8, 2003 Filed: Nov 1, 2001
Inventors
David Ziger
Edward Dension
Pierre Leroux
Assignee (at issue)
KONINKLIJKE PHILIPS ELECTRONICS NV

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.

Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,544,859
App. No.
10/003,130
Filed
2001-11-01
Granted
2003-04-08
Kind
B2