Granted Patent
Utility
US 6,545,321 · App. 10/099,708
ESD protection circuit for a semiconductor integrated circuit
Inventor:
Yasuyuki Morishita
Patented Case
View Patent ↗
Granted: Apr 8, 2003
Filed: Mar 15, 2002
Inventor
Yasuyuki Morishita
Assignee (at issue)
NEC Electronics Corporation
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.