Granted Patent
Utility
US 6,553,521 · App. 09/511,169
Method for efficient analysis semiconductor failures
Inventors:
Dieter Rathei, Thomas Giegold, Joerg Wohlfahrt
Patented Case
View Patent ↗
Granted: Apr 22, 2003
Filed: Feb 24, 2000
Inventors
Dieter Rathei
Thomas Giegold
Joerg Wohlfahrt
Assignee (at issue)
Infineon Technologies Richmond, LP
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.