Granted Patent
Utility
US 6,573,170 · App. 09/748,163
Process for multilayer wiring connections and bonding pad adhesion to dielectric in a semiconductor integrated circuit device
Inventors:
Takashi Aoyagi, Atsushi Ogishima, Hirotaka Kobayashi, Yuji Hara
Patented Case
View Patent ↗
Granted: Jun 3, 2003
Filed: Dec 27, 2000
Inventors
Takashi Aoyagi
Atsushi Ogishima
Hirotaka Kobayashi
Yuji Hara
Assignees (at issue)
HITACHI, LTD.
Hitachi Ulsi Systems Co., Ltd.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.