IP Library › Granted Patent US 6,574,713
Granted Patent Utility
US 6,574,713 · App. 09/685,431

Heuristic for identifying loads guaranteed to hit in processor cache

Inventors: Nicolai Kosche, Peter C. Damron
Patented Case View Patent ↗
Granted: Jun 3, 2003 Filed: Oct 10, 2000
Inventors
Nicolai Kosche
Peter C. Damron
Assignee (at issue)
Sun Microsystems Inc.

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Quick Facts
Patent No.
US 6,574,713
App. No.
09/685,431
Filed
2000-10-10
Granted
2003-06-03
Kind
B1