Granted Patent
Utility
US 6,584,005 · App. 10/302,963
Semiconductor memory device preventing erroneous writing in write operation and delay in read operation
Inventors:
Hiroshi Kato, Masatoshi Ishikawa, Tsukasa Ooishi, Jun Ohtani, Hideto Hidaka
Patented Case
View Patent ↗
Granted: Jun 24, 2003
Filed: Nov 25, 2002
Inventors
Hiroshi Kato
Masatoshi Ishikawa
Tsukasa Ooishi
Jun Ohtani
Hideto Hidaka
Assignee (at issue)
MITSUBISHI ELECTRIC CORPORATION
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.