Granted Patent
Utility
US 6,591,385 · App. 09/659,539
Method and apparatus for inserting programmable latency between address and data information in a memory tester
Inventors:
Alan S. Krech, Jr., John M Freeseman
Patented Case
View Patent ↗
Granted: Jul 8, 2003
Filed: Sep 11, 2000
Inventors
Alan S. Krech, Jr.
John M Freeseman
Assignee (at issue)
Agilent Technologies, Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.