System of a package fabricated on a semiconductor or dielectric wafer with wiring on one face, vias extending through the wafer, and external connections on the opposing face

Granted: Jul 15, 2003 Filed: Apr 19, 2001

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.