Granted Patent
Utility
US 6,596,583 · App. 10/002,906
Methods for forming and integrated circuit structures containing ruthenium and tungsten containing layers
Inventors:
Vishnu K. Agarwal, Garo Derderian, Gurtej S. Sandhu, Weimin Li, Mark Visokay, Cem Basceri, Sam Yang
Patented Case
View Patent ↗
Granted: Jul 22, 2003
Filed: Oct 29, 2001
Inventors
Vishnu K. Agarwal
Garo Derderian
Gurtej S. Sandhu
Weimin Li
Mark Visokay
Cem Basceri
Sam Yang
Assignee (at issue)
Micron Technology, Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.