Granted Patent
Utility
US 6,596,589 · App. 09/976,446
Method of manufacturing a high coupling ratio stacked gate flash memory with an HSG-SI layer
Inventor:
Horng-Huei Tseng
Patented Case
View Patent ↗
Granted: Jul 22, 2003
Filed: Oct 12, 2001
Inventor
Horng-Huei Tseng
Assignee (at issue)
VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.