Granted Patent
Utility
US 6,599,778 · App. 10/026,103
Chip and wafer integration process using vertical connections
Inventors:
H. Bernhard Pogge, Roy Yu, Chandrika Prasad, Chandrasekhar Narayan
Patented Case
View Patent ↗
Granted: Jul 29, 2003
Filed: Dec 19, 2001
Inventors
H. Bernhard Pogge
Roy Yu
Chandrika Prasad
Chandrasekhar Narayan
Assignee (at issue)
International Business Machines Corporation
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.