Granted Patent
Utility
US 6,603,688 · App. 09/811,400
Semiconductor memory device having improved arrangement for replacing failed bit lines
Inventors:
Masatoshi Hasegawa, Kazuhiko Kajigaya
Patented Case
View Patent ↗
Granted: Aug 5, 2003
Filed: Mar 20, 2001
Inventors
Masatoshi Hasegawa
Kazuhiko Kajigaya
Assignee (at issue)
HITACHI, LTD.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.