IP Library Granted Patent US 6,605,477
Granted Patent Utility
US 6,605,477 · App. 10/262,003

Integrated circuit device including a layered superlattice material with an interface buffer layer

Inventor: Kiyoshi Uchiyama
Patented Case View Patent ↗
Granted: Aug 12, 2003 Filed: Sep 30, 2002
Inventor
Kiyoshi Uchiyama
Assignee (at issue)
SUMITOMO ELECTRIC INDUSTRIES, LTD.

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Quick Facts
Patent No.
US 6,605,477
App. No.
10/262,003
Filed
2002-09-30
Granted
2003-08-12
Kind
B2