Granted Patent
Utility
US 6,606,699 · App. 09/783,156
Merged control/process element processor for executing VLIW simplex instructions with SISD control/SIMD process mode bit
Inventors:
Gerald George Pechanek, Juan Guillermo Revilla
Patented Case
View Patent ↗
Granted: Aug 12, 2003
Filed: Feb 14, 2001
Inventors
Gerald George Pechanek
Juan Guillermo Revilla
Assignee (at issue)
Bops, Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.