IP Library Granted Patent US 6,629,271
Granted Patent Utility
US 6,629,271 · App. 09/472,839

Technique for synchronizing faults in a processor having a replay system

Inventors: Yung-Hsiang Lee, Douglas M. Carmean, Rohit A. Vidwans
Patented Case View Patent ↗
Granted: Sep 30, 2003 Filed: Dec 28, 1999
Inventors
Yung-Hsiang Lee
Douglas M. Carmean
Rohit A. Vidwans
Assignee (at issue)
Intel Corporation

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Quick Facts
Patent No.
US 6,629,271
App. No.
09/472,839
Filed
1999-12-28
Granted
2003-09-30
Kind
B1